1. general description the 74ahc138-q100; 74ahct138-q100 are high -speed si-gate cmos devices and are pin compatible with low-power schottky ttl (lsttl). they are specified in compliance with jedec standard no. 7a. the 74ahc138-q100; 74ahct138-q100 is a 3-to-8 line decoder/demultiplexer. it accepts three binary weighted address inputs (a0, a1 and a2). when enabled, it provides eight mutually exclusive outputs (y 0to y 7) that are low when selected. there are three enable inputs: two active low (e 1ande 2) and one active high (e3). every output is high unless e 1 and e 2 are low and e3 is high. this multiple enable function , allows easy parallel expansion of the device to a 1-of-32 (5 lines to 32 lines) decoder with just four 74ahc138-q100; 74ahct138-q100 devices and one inverter. the 74ahc138-q100; 74 ahct138-q100 can be used as an eight output demultiplexer by using one of the active low enable inputs as the data input and the remaining enable inputs as strobes. unus ed enable inputs must be permanently tied to their appropriate active high or low state. this product has been qualified to the automotive electronics council (aec) standard q100 (grade 1) and is suitable for use in automotive applications. 2. features and benefits ? automotive product qualif ication in accordance with aec-q100 (grade 1) ? specified from ? 40 ? c to +85 ? c and from ? 40 ? c to +125 ? c ? balanced propagation delays ? all inputs have schmitt-trigger action ? demultiplexing capability ? multiple input enable for easy expansion ? ideal for memory chip select decoding ? inputs accept voltages higher than v cc ? for 74ahc138-q100 only: operates with cmos input levels ? for 74ahct138-q100 only: operates with ttl input levels ? esd protection: ? mil-std-883, method 3015 exceeds 2000 v ? hbm jesd22-a114f exceeds 2000 v ? mm jesd22-a115-a exceeds 200 v (c = 200 pf, r = 0 ? ) ? multiple package options 74ahc138-q100; 74ahct138-q100 3-to-8 line decoder/de multiplexer; inverting rev. 2 ? 2 april 2014 product data sheet
74ahc_ahct138_q100 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights reserved. product data sheet rev. 2 ? 2 april 2014 2 of 17 nxp semiconductors 74ahc138-q100; 74ahct138-q100 3-to-8 line decoder/de multiplexer; inverting 3. ordering information 4. functional diagram table 1. ordering information type number package temperature range name description version 74ahc138d-q100 ? 40 ? c to +125 ? c so16 plastic small outl ine package; 16 leads; body width 3.9 mm sot109-1 74ahct138d-q100 74ahc138pw-q100 ? 40 ? c to +125 ? c tssop16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm sot403-1 74AHCT138PW-Q100 74ahc138bq-q100 ? 40 ? c to +125 ? c dhvqfn16 plastic dual in-line compatible thermal-enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 ? 3.5 ? 0.85 mm sot763-1 74ahct138bq-q100 fig 1. logic symbol fig 2. iec logic symbol y0 y1 y2 y3 y4 y5 y6 y7 7 9 10 11 12 13 14 15 a0 a1 a2 3 2 1 6 5 4 e2 e1 e3 mna370 mna371 7 9 10 11 12 13 14 & x/y 15 7 en 6 5 4 3 2 1 0 6 5 4 3 2 1 1 4 2 7 9 10 11 12 13 14 & dx (a) (b) 15 7 6 5 4 3 2 1 0 6 5 4 3 2 1 0 2 g 0 7 fig 3. functional diagram mna372 enable exiting y0 y1 y2 y3 y4 y5 y6 y7 7 9 10 11 12 13 14 15 a0 a1 a2 3-to-8 decoder 3 2 1 6 5 4 e2 e1 e3
74ahc_ahct138_q100 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights reserved. product data sheet rev. 2 ? 2 april 2014 3 of 17 nxp semiconductors 74ahc138-q100; 74ahct138-q100 3-to-8 line decoder/de multiplexer; inverting 5. pinning information 5.1 pinning 5.2 pin description (1) this is not a supply pin. the substrate is attached to this pad using conductive die atta ch material. there is no electrical or mechanical requi rement to solder this pad. however, if it is soldered, the solder land should remain floating or be connected to gnd. fig 4. pin configuration for so16 and tssop16 fig 5. pin configuration for dhvqfn16 $ + & |